Apple responds to battery life concerns with its A9 SoCs
Apple tree responds to battery life concerns with its A9 SoCs
Yesterday, we covered reports from concerned iPhone 6s and 6s Plus owners, who have seen markedly different results between those devices built on Samsung's 14nm node and those using TSMC'south 16nm. Apple has since released a argument covering these concerns in greater item than we initially alluded to yesterday, and it'due south worth considering how the company'southward statements fit into the overall pic. Apple's statement is reprinted below:
With the Apple-designed A9 bit in your iPhone 6s or iPhone 6s Plus, you are getting the most advanced smartphone fleck in the earth. Every chip nosotros ship meets Apple'south highest standards for providing incredible performance and evangelize bang-up battery life, regardless of iPhone 6s capacity, color, or model.
Certain manufactured lab tests which run the processors with a continuous heavy workload until the battery depletes are not representative of real-world usage, since they spend an unrealistic amount of fourth dimension at the highest CPU performance land. It's a misleading mode to measure existent-world battery life. Our testing and customer data show the bodily battery life of the iPhone 6s and iPhone 6s Plus, even taking into account variable component differences, vary within merely 2-3% of each other.
Of benchmarks and bombardment life
Apple has a betoken when information technology says that benchmarks don't often track the real-world feel of actually using a device. The primary purpose of most benchmarks is to gather operation data, and the advent of modern benchmarking has its roots firmly in the pre-smartphone era, when battery life wasn't relevant to desktops and workstations. Even now, many battery life tests corporeality to "Echo this workload until the phone dies."
Whether you use a calorie-free or heavy workload on a phone tin accept a profound bear on on its battery life — and, by extension, on how the phone tests in comparison to other devices. Anandtech made this point in their ain investigation:

Compare the iPhone 5s against the iPhone 6. The iPhone 6'due south bombardment is 16% larger than the iPhone 5s's, but the iPhone six'southward lite usage run-fourth dimension is nearly 30% longer than the iPhone 5s. Clearly, the later silicon is more ability efficient. Under heavy load, however, the iPhone 6'southward larger battery only manages to equal the iPhone 5s's total run-time — not exceed information technology. Meanwhile, the iPhone 6 Plus's heavy run time is worse than the Galaxy Note 5's, but more 90 minutes better in light usage.
This is why information technology'southward impossible to dismiss Apple's response as "You're holding information technology wrong," despite the tone-deaf way the company communicated its argument. If a battery test doesn't accurately capture the way people use the phone, it's a bad criterion. It may accurately measure ability consumption between two devices in a stated workload, but the entire indicate of such workloads is to really capture real-globe conditions.
Thus far, the bombardment tests that have been floated have involved looping a JavaScript test and Geekbench's fixed-load test, which plainly stresses the iPhone 6 Plus at a fairly constant thirty%. Neither of these are particularly representative of real-earth conditions. In fact, in the one examination we've seen where real-world loading was performed (a video playback test for threescore minutes), both of the iPhones lost the same corporeality of battery life. This implies that in at least some conditions, power consumption between the 2 devices is basically identical.
Rut and variability
At that place are ii potential factors that could exist causing Samsung devices to exhibit poor performance under load as compared to TSMC equivalents. The first, which nosotros alluded to in our initial article, is rut. Transistors that are packed together more tightly naturally concentrate more heat into smaller areas. In that location'southward a clear and known relationship between heat and ability consumption, and while the exact relationship varies from chip to scrap and node to node, it'south well-known that temperature has a significant impact.
The second cistron that comes into play here is variability. It's important to understand that while we talk virtually Apple edifice an A9 processor in the same fashion that we might discuss Ford building an engine, at that place are some critical differences betwixt the two. When TSMC, Intel, or Samsung builds a wafer of chips, they don't automatically "know" what kind of chips they take. Each visitor volition test their silicon to determine how skillful (or bad) the wafer is. Good fries are those that can run at the target voltage and clock speeds with desired ability consumption levels. Bang-up chips are those that can run at dramatically lower ability consumption, or striking higher clock speeds, while bad chips are those that consume too much ability or merely tin't accomplish target frequencies.
Each company has different methods of recovering useful dies from poor samples, whether that means disabling some of the cache, ane of the cores, or using the chip in a desktop arrangement where battery power isn't such a business organisation. The of import matter to understand is that variability has been getting steadily worse with every product generation. To empathize why, consider a hypothetical scenario in which a "adept" transistor contains betwixt 100-200 atoms of a material, a "bang-up" transistor contains between 140-160 atoms, and a bad transistor (that won't see desired specifications) has either less than 100 or more 200. In this example, these numbers correspond to an older process node — say, 45nm.

Now, imagine this same situation, merely with very dissimilar numbers. In our 2d example, a good transistor contains between 20 and 40 atoms of a doping material, a great transistor has betwixt 28 – 32 atoms, and a bad transistor is whatever transistor with less than twenty or more than forty. It's much, much harder to control the distribution of 20 atoms than it is to control the distribution of 100 atoms. Remember, that since 14nm fries have much more than transistors than 45nm chips, it'southward not simply a question of tighter control — you have to be more perfect to keep fail rates under control. This is why modern fries are sometimes designed with built-in logic redundancy — if 1 component of a chip doesn't pass muster, you've got duplicate units ready to go.
Hither's what this means, in aggregate: While we are certain that Apple still strictly targets certain ranges for its parts, we'd expect to see greater variation in run-time and battery life between TSMC and Samsung hardware because even a company has legendarily strict every bit Apple has to accept the laws of physics.
What does this mean for TSMC vs. Samsung?
Thus far, Apple tree'southward official position is that there is no difference between TSMC and Samsung devices. We doubtable that if the visitor breaks from this stance, it will exist because of oestrus differences betwixt the two devices, rather than operation metrics. There are subtle ways to adjust performance to cut down on skin temperature, and information technology may be possible to create power rules for the Samsung devices that are dissimilar than those used for TSMC.
The one thing we'll stick to is that this variation is nearly certainly why Apple was forced to dual source its hardware in the starting time place. What will exist interesting is seeing whether or not this effect continues with later iterations of the telephone. Samsung and TSMC are both consistently improving yield on 16/14nm, which means we'll come across those improvements reflected in devices — even if Apple never announces that its later products have better ability consumption or lower temperatures compared with the newer ones.
Source: https://www.extremetech.com/mobile/216012-apple-responds-to-iphone-6s-battery-life-concerns-with-its-a9-socs
Posted by: lewisvengland.blogspot.com

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